1. Field of the Invention
The present disclosure relates generally to a memory device, and more specifically to a method of booting a system with a non-volatile memory device, and a related memory device.
2. Description of the Prior Art
In the course of erasing a non-volatile memory—or more specifically speaking, in the course of erasing a certain block within the non-volatile memory—unintended interrupts such as unexpected power off may occur. The complete erase operation will not be successfully executed in such a case. For instance, referring to FIG. 1, if the block has accomplished the “Erase” step shown in FIG. 1 but has not completed the “Over Erase Correction (OEC)” step before the unexpected power off happens, Bit Line (hereinafter BL) leakage may occur due to the Over Erase phenomenon. After the system is powered on again, this BL leakage may further affect dependent block(s) sharing a BL with the block which has not been successfully erased. If the dependent block(s) stores important booting codes inside, the booting code may fail to be read out by the system while the system is performing a start-up operation after being powered on again. This will eventually induce either a serious system failure or longer boot time.
With the ongoing and significant growth in the field of portable electronics, system stability is a major issue in many consumer electronics. Additionally, as high volume consumer markets continue to drive increasing levels of memory blocks being merged in a memory device, the potential for BL leakage has steadily increased the demands for better solutions to memory erase operations.